processor interrupt
英 [ˈprəʊsesə(r) ˌɪntəˈrʌpt]
美 [ˈprɑːsesər ˌɪntəˈrʌpt]
网络 可遮蔽式中断
双语例句
- For example, using a fast modern processor, Linux can provide a typical interrupt response of20 μ s, but occasionally the response can be much longer.
例如，使用快速的现代处理器时，Linux可以提供20μ微秒的典型中断响应，但有时候响应会变得很长。 - If a D-cache miss ( the processor fails to find data in the D-cache) occurs, an interrupt is raised so that the corresponding register can record this event by increasing its value.
如果发生D-cache失效（处理器无法在D-cache中找到数据），那么发出一个中断，让相应的寄存器可以通过增加它的值记录这一事件。 - Each processor on the CPU has its own CSA ( current save area) pointer that points to the MST that is to be used when a thread or interrupt handler is interrupted or swapped due to context switch.
CPU上的每个处理器都拥有自己的CSA（当前保存区）指针，指向当线程或中断处理程序由于上下文切换而被中断或交换时使用的MST。 - If the value is non-zero, then the processor was handling an interrupt.
如果值为非0的值，则处理器正在处理中断。 - This table contains the processor's mapping between interrupts and interrupt service routines and must be initialized by the programmer.
这个表格包含中断与中断服务程序之间的处理器的映射，必须由程序员进行初始化。 - When an interrupt occurs, the current state of the processor is saved and an interrupt service routine is executed.
当一个中断发生，当前的处理器状态被保存并且中断服务程序开始运行。 - The processor does this through the use of a page fault interrupt.
处理器通过缺页中断来进行这个操作。 - The processor will store the virtual address which caused the page fault in a register, and then signal the operating system through an interrupt handler.
它把导致页面失效的虚拟地址装入寄存器中，再利用中断句柄来通知操作系统。 - Code that the processor jumps to on receipt of an interrupt request.
使处理器跳转到中断请求接收的编码。 - The processor read the FIFO storage data using the interrupt method in the procession of data processing.
在进行数据处理过程中，处理器以中断方式读取FIFO缓存结果。 - It not only can efficiently process Local Interrupt and System Interrupt in single processor system, but also it can process the inter-processor interrupt among multiprocessors.
X微处理器中所使用的APIC系统不仅能处理本地中断和外部设备产生的系统中断，还支持多处理器环境下的处理器间中断。 - The function modules of the new ERT system based on Digital Signal Processor ( DSP) have been achieved, including the control strategy, exciting unit, electrodes switching unit, signal processing unit and external/ internal interrupt in DSP.
实现了基于数字信号处理器（DSP）ERT新系统中的各单元功能，包括整体控制策略以及激励单元、电极切换控制单元、信号调理单元、以及DSP内/外部中断的软件实现。 - The result shows that by using software interrupt mode, this system insures the software modularization as well as enhances the universal property of the TCPB ( terminal control processor board) board and thus saves the interrupt resources.
分析结果表明：该系统利用软件中断方式既保证了软件的模化特性，又增强了TCPB（终端控制板）的通用性，节省了中断资源。 - Windows and Linux has each interrupt processor, specifically interrupt service program is searched with interrupt assignment table.
Windows和Linux有各自的中断处理机制，都使用中断分配表来查找特定中断服务程序。 - The author puts forwards the hardware design scheme of information processor, analyses power supply circuit, DSP reset circuit, interrupt control, as well as several key circuits, and determines the selection of various chips. 3.
并对电源电路、DSP复位电路和中断控制等几个关键电路进行了分析，确定了各种芯片的选型。 - The chip consists of four local processor subsystems and sharing module ( shared memory, interrupt controller, resource management) components. Each processor subsystem with the same structure, include the processor core and local memory.
本设计由四个局部处理器子系统和共享模块（共享存储器、通信控制器、资源管理器）组成，每个处理器子系统具有相同结构，包括处理器核与局部存储器。